The present invention relates to a semiconductor device and a manufacturing method thereof. More particularly, it relates to a technology effectively applicable to a semiconductor device having a nonvolatile memory and a manufacturing method thereof.
As electrically writable/erasable nonvolatile semiconductor storage devices, EEPROMs (Electrically Erasable and Programmable Read Only Memories) have been widely used. The storage devices (memories) typified by currently and widely used flash memories have conductive floating gate electrodes surrounded by an oxide film and trapping insulation films under gate electrodes of MISFETs. The storage devices use charge storage states at the floating gates and the trapping insulation film as storage information, and read out the information as a threshold value of each transistor. The trapping insulation film denotes an insulation film capable of storing electric charges. As one example thereof, mention may be made of a silicon nitride film. Injection/discharge of charges into such charge storage regions causes each MISFET to be shifted in threshold value and to operate as a storage element. The flash memories include a split gate type cell using a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) film. Such a memory has the following advantages: use of a silicon nitride film as a charge storage region leads to an excellent data holding reliability because electric charges are stored discretely as compared with a conductive floating gate, and the excellent data holding reliability can reduce the film thickness of the oxide films over and under the silicon nitride film, which enables a lower voltage for write/erase operation; and other advantages.
Japanese Unexamined Patent Publication No. 2005-347679 (PTL 1) and Japanese Unexamined Patent Publication No. 2003-309193 (PTL 2) each describe the following technology: in a MONOS type nonvolatile memory, over a selection gate electrode (control gate electrode), an insulation film is formed, and at the sidewall of a lamination film including the selection gate electrode (control gate electrode), and the insulation film formed thereover, a memory gate electrode (memory gate) is formed.
Japanese Unexamined Patent Publication No. 2007-251079 (PTL 3) discloses a problem of preventing a short circuit between the control gate electrode and the memory gate electrode of a MONOS type nonvolatile memory. As a solving means therefor, there is described the following technology: over the control gate electrode and the memory gate electrode of the MONOS type nonvolatile memory, silicide is formed, and the surface of the silicide is oxidized, thereby to improve the reliability and the manufacturing yield of the semiconductor device.